A non-volatile memory, such as a ferroelectric Random Access Memory (FRAM), a magnetoresistive Random Access Memory (MRAM), a phase-change Random Access Memory (PRAM), and the like, may access in a byte unit and may simultaneously maintain contents without a power supply. The non-volatile memory has been the focus of attention as a next generation device being capable of efficiently compensating a weak point of a conventional Flash memory, and a dynamic Random Access Memory (DRAM) device.
However, although the DRAM device and an SRAM device may temporarily store unintentional data when a power is abnormally shut down, a volatile device such as the DRAM may not be able to maintain the data without the power supply, and thus, the temporarily stored data may be destructed when the power is cut off. The flash memory device stores data based on a block unit, and the power of the flash memory device may be maintained at an threshold voltage level for an appropriate time to store the data. When the power is abnormally shut down, a time where the power is maintained at the threshold voltage level is insufficient to store the data in the flash memory device.
However, the non-volatile memory may store the data during a short time where the power is maintained at the threshold voltage level. In this instance, all signals transmitted to a memory device are regarded as normal signals.
When the power is shut down in a system, the power supplied to a non-volatile memory chip slowly decreases due to an effect of a capacitor from a time when the power is shut down. That is, although the power is cut off, a device is operational until a voltage is less than or equal to a threshold voltage. Conversely, when the system is shut down, a memory controller may decrease voltages of all signal lines including a chip selection signal, a write enable signal, and the like, to 0V, and thus, data may be inadvertently written in an address number 0 of all memory addresses.
Accordingly, there is need for a method of protecting data in a non-volatile memory so as not to destroy data of the non-volatile memory when the power is shut down in the system.